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71 Kohki Taniguchi, Makoto Nagata, Akihiro Tsukioka, Daisuke Fujimoto, Noriyuki Miura, Takao Egami, Rieko Akimoto, Kenji Niinomi, Terumitsu Komatsu, Yoshinori Fukuba, Atsushi Tomishima, "Susceptibility Evaluation of CAN Transceiver Circuits with In-Place Waveform Capturing under RF DPI," in Proceedings of the 11th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo 2017), pp. 59-63, July 2017. (St. Petersburg)
70 Masahiro Yamaguchi, Yasushi Endo, Peng Fan ,Jingyan Ma ,Satoshi Tanaka, Yasunori Miyazawa,Makoto Nagata, "Analysis of Patterned Magnetic Thin-film Noise Suppressor for RF IC Chip," in Proceedings of the 11th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo 2017), pp. 45-49, July 2017. (St. Petersburg)
69 Noriyuki Miura, Kohei Matsuda, Makoto Nagata, Shivam Bhasin, Ville Yli-Mayry, Naofumi Homma, Yves Mathieu, Tarik Graba, Jean-Luc Danger, "A 2.5ns-Latency 0.39pJ/b 289µm²/Gb/s Ultra-Light-Weight PRINCE Cryptographic Processor," 2017 Symposium on VLSI Circuits, Dig. of Tech. Papers, #20.2, pp. 266-267, June 2017. Kyoto.
68 Hiroaki Ikeda, Shigenobu Sekine, Ryuji Kimura, Koichi Shimokawa, Keiji Okada, Hiroaki Shindo, Tatsuya Ooi, Rei Tamaki, Makoto Nagata, "Cu-Sn Based Joint Material Having IMC Forming Control Capabilities," in Proceedings of International Conference on Electronics Packaging (ICEP 2017), #TC4-2, pp. 171-176, Apr. 2017. (Yamagata)
67 Noriyuki Miura, Shijia Liu, Tsuyoshi Watanabe, Shigeki Imai, Makoto Nagata, "A Permanent Digital Archive System Based on 4F2 X-Point Multi-Layer Metal Nano-Dot Structure," Dig. Tech. Papers, 2017 IEEE Intl. Solid-State Circuits Conference (ISSCC), #15.8, pp. 270-271, Feb. 2017. San Francisco.
66 Wei He, Jakub Breier, Shivam Bhasin, Noriyuki Miura, Makoto Nagata, "An FPGA-Compatible PLL-Based Sensor against Fault Injection Attack," Proc. ACM 2017 Asia and South Pacific Design Automation Conference (ASP-DAC 2017), #1S-18, pp. 1-2, Jan. 2017. Makuhari, Chiba.
65 Kohei Matsuda, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Tatsuya Fujii, Kazuo Sakiyama, "On-chip substrate-bounce monitoring for laser-fault countermeasure," 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), pp. 1-6, Dec. 2016. Yilan.
64 Yuuki Araga, Makoto Nagata, Noriyuki Miura, Hiroaki Ikeda, Katsuya Kikuchi, "Superiority of In-Stack Decoupling Capacitor for 3D-LSI with Wide I/O Data Bus," Extended Abstracts of the 2016 International Conference on Solid State Devices and Materials (SSDM 2016), #K-1-3, pp. 469-470, Sep. 2016. Tsukuba.
63 Takuji Miki, Noriyuki Miura, Kento Mizuta, Shiro Dosho, Makoto Nagata, "A 500MHz-BW -52.5dB-THD Voltage-to-Time Converter Utilizing a Two-Step Transition Inverter," Proc. IEEE 2016 European Solid-State Circuits Conference (ESSCIRC 2016), #A2L-J_1, pp. 141-144, Sep. 2016. Lausanne.
62 Yuuki Araga, Makoto Nagata, Noriyuki Miura, Hiroaki Ikeda, Katsuya Kikuchi, "EMI Performance of Power Delivery Networks in 3D TSV Integration," Proc. IEEE 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016), #OS12-2, pp. 428-433, Sep. 2016. (9/7) Wroclaw.
61 Wei He, Jakub Breier, Shivam Bhasin, Noriyuki Miura, Makoto Nagata, "Ring Oscillator Under Laser: Potential of PLL Based Countermeasure Against Laser Fault Injection," Proc. IEEE 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2016), #4.2, pp. 102-113, Aug. 2016. (8/16) Santa Barbara. DOI: 10.1109/FDTC.2016.13
60 Noriyuki Miura, Zakaria Najm, Wei He, Shivam Bhasin, Xuan Thuy Ngo, Makoto Nagata, Jean-Luc Danger, "PLL to the Rescue: A Novel EM Fault Countermeasure," Proc. 2016 53rd ACM/EDAC/IEEE Design Automation Conference (DAC 2016), #57.5, pp. 1-6, June 2016. (6/8) Austin. DOI: http://dx.doi.org/10.1145/2897937.2898065
59 Hiroaki Ikeda, Shigenobu Sekine, Ryuji Kimura, Koichi Shimokawa, Keiji Okada, Hiroaki Shindo, Tatsuya Ooi, Rei Tamaki, Makoto Nagata, "Die Attach Material for Power Semiconductor Having Nano-Level Sn-Cu Diffusion Control," Proc. 2016 IEEE 66th Electronic Components and Technology Conference (ECTC 2016), #10.3, pp. 426-431, June 2016. (6/1) Las Vegas. DOI: 10.1109/ECTC.2016.122
58 Daisuke Ishihata, Naofumi Homma, Yu-ichi Hayashi, Noriyuki Miura, Daisuke Fujimoto, Makoto Nagata, Takafumi Aoki, "Enhancement of Reactive Countermeasure against Side-Channel Attacks with Microprobing," in Proceedings of the 25th Intl. Workshop on Post-Binary ULSI Systems, pp. 28-32, May 2016.
57 Kazuo Sakiyama, Momoka Kasuya, Takanori Machida, Arisa Matsubara, Yunfeng Kuai, Yu-Ichi Hayashi, Takaaki Mizuki, Noriyuki Miura, Makoto Nagata, "Physical Authentication Using Side-Channel Information," Proc. IEEE International Conference on Information and Communication Technology (ICoICT 2016), May 2016. DOI: 10.1109/ICoICT.2016.7571953
56 Hiroaki Ikeda, Shigenobu Sekine, Ryuji Kimura, Koichi Shimokawa, Keiji Okada, Hiroaki Shindo, Tatsuya Ooi, Rei Tamaki, Makoto Nagata, "Fine Pitch Micro-Bump Forming by Printing," Proc. 2016 International Conference on Electronics Packaging (ICEP 2016), pp. 260-264, Apr. 2016. Sapporo.
55 Hiroaki Ikeda, Shigenobu Sekine, Ryuji Kimura, Koichi Shimokawa, Keiji Okada, Hiroaki Shindo, Tatsuya Ooi, Rei Tamaki, Makoto Nagata, "3DIC/TSV Process Developments by Printing Technologies," Proc. IEEE CPMT Symposium Japan (ICSJ 2015), pp. 140-143, Nov. 2015. Kyoto.
54 Satoshi Tanaka, Peng Fan, Jingyan Ma, Hanae Aoki, Masahiro Yamaguchi, Makoto Nagata, Sho Muroga, "Analysis of On-Chip Digital Noise Coupling Path for Wireless Communication IC Test Chip," Proc. 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo), #8-1(poster), pp. 216-221, Nov. 2015. Edinburgh.
53 Hiroaki Ikeda, Shigenobu Sekine, Ryuji Kimura, Koichi Shimokawa, Keiji Okada, Hiroaki Shindo, Tatsuya Ooi, Rei Tamaki, Makoto Nagata, "Nano-Function Materials for TSV Technologies," Proc. 2015 International 3D Systems Integration Conference (3DIC 2015), pp. TS5.3.1-TS5.3.6, Sep. 2015. Sendai.
52 Masahiro Yamaguchi, Peng Fan, Satoshi Tanaka, Makoto Nagata, Sho Muroga, "Analysis of Intra-Chip Degital Noise Coupling Path in Fully LTE Compliant RF Receiver Test Chip," Proc. Joint IEEE International Symposium on Electromagnetic Compatibility and EMC Europe (EMC 2015), #Track N-4, pp.1007-1011, Aug. 2015. Dresden.
51 Noriyuki Miura, Daisuke Fujimoto, Makoto Nagata, "Proactive and Reactive Protection Circuit Techniques Against EM Leakage and Injection," Proc. Joint IEEE International Symposium on Electromagnetic Compatibility and EMC Europe (EMC 2015), #SS-1-7, pp. 252-257, Aug. 2015. Dresden.
50 Noriyuki Miura, Daisuke Fujimoto, Makoto Nagata, Naofumi Homma, Yuichi Hayashi, Takafumi Aoki, "EM Attack Sensor: Concept, Circuit, and Design-Automation Methodology (Invited)," Proc. ACM Design Automation Conference 2015 (DAC 2015), #69.2, pp. 1-6, June 2015. San Francisco.
49 Masahiro Yamaguchi, Satoshi Tanaka, Yasushi Endo, Sho Muroga, Makoto Nagata, "On-chip Integrated Magnetic Thin-Film Solution to Countermeasure Digital Noise on RF IC," Proc. 2015 IEEE Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC 2015), #SS10-5, pp. , May 2015. Taipei.
48 Kohki Taniguchi, Noriyuki Miura, Taisuke Hayashi, Makoto Nagata, "At-Product-Test Dedicated Adaptive Supply-Resonance Suppression," Proc. 2015 IEEE 33rd VLSI Test Symposium (VTS 2015), #06A-1, pp. 127-130, May. 2015. Napa.
47 Hiroaki Ikeda, Shigenobu Sekine, Ryuji Kimura, Koichi Shimokawa, Keiji Okada, Hiroaki Shindo, Tatsuya Ooi, Makoto Nagata, "Nano-Function Paste for Power Semiconductors ," Proc. 2015 International Conference on Electrnoics Packaging and iMAPS All Asia Conference (ICEP-IAAC 2015), #TE3-1, pp. 482-485, Apr. 2015. Kyoto.
46 Daisuke Fujimoto, Makoto Nagata, Shivam Bhasin, Jean-Luc Danger, "A Novel Methodology for Testing Hardware Security and Trust Exploiting On-Chip Power Noise Measurement," Proc. 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), #8C-3, pp. 749-754, Jan. 2015. Makuhari.
45 Daisuke Fujimoto, Noriyuki Miura, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata, "A DPA/DEMA/LEMA-Resistant AES Cryptographic Processor with Supply-Current Equalizer and Micro EM Probe Sensor ," Proc. 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), #1S-13, pp. 26-27, Jan. 2015. Makuhari.
44 Masahiro Yamaguchi, Satoshi Tanaka, Yasushi Endo, Makoto Nagata, Hiroaki Matsui, Mizuki Iwanami, Kenta Tsukamoto, "IC Chip Level Low Noise Technology for High Speed and High Quality Telecommunication Systems (Invited)," Proceedings of Asia-Pacific Microwave Conference 2014 (APMC 2014), TH2E-1, pp. 540-542, Nov. 2014. (Sendai)
43 Makoto Nagata, Daisuke Fujimoto, Noriyuki Miura, "On-Chip Monitoring for In-Place Diagnosis of Undesired Power Domain Problems in IC Chips," The 23rd Asian Test Symposium (ATS 2014), #6C-3, pp. 258-262, 2014.11.18. Hangzhou.
42 Noriyuki Miura, Daisuke Fujimoto, Rie Korenaga, Kohei Matsuda, Makoto Nagata, "An Intermittent-Driven Supply-Current Equalizer for 11x and 4x Power-Overhead Savings in CPA-Resistant 128bit AES Cryptographic Processor," Proc. 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC 2014), #14-5, pp. 225-228, Nov. 2014. Kaohsiung.
41 Naofumi Homma, Yu-ichi Hayashi, Noriyuki Miura, Daisuke Fujimoto, Daichi Tanaka, Makoto Nagata, Takafumi Aoki, "EM Attack Is Non-Invasive? -- Design Methodology and Validity Verification of EM Attack Sensor," IACR Workshop on Cryptographic Hardware and Embedded Systems 2014 (CHES 2014), #1-1, LNCS 8731, pp. 1-16, Sep. 2014. Busan.
40 Yuuki Araga, Ranto Miura, Makoto Nagata, Cesar Roda Neve, Joeri De Vos, Geert Van der Plas, Eric Beyne, "A Study on Power Integrity in a 3D Chip Stack Using Dynamic Power Supply Current Emulation and Power Noise Monitoring," IEEE Electronics System-Integration Technology Conference (ESTC 2014), #S14P2, pp. 1-5, Sep. 2014. Helsinki.
39 Makoto Nagata, Satoshi Takaya, Hiroaki Ikeda, Dimitri Linten, Mirko Scholz, Shih-Hung Chen, Keiichi Hasegawa, Taizo Shintani, Masanori Sawada, "CDM Protection of a 3D TSV Memory IC with a 100 GB/s Wide I/O Data Bus," Proc. ESDA 36th Annual EOS/ESD Symposium, #2A-2, pp. 1-7, Sep. 2014. Tuscon.
38 Noriyuki Miura, Daisuke Fujimoto, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata, "Integrated-Circuit Countermeasures Against Information Leakage Through EM Radiation," Proc. 2014 IEEE Intl. Symposium on Electromagnetic Compatibility, #TH-AM-3-3, pp. 748-751, Aug. 2014. Raleigh.
37 Noriyuki Miura, Daisuke Fujimoto, Daichi Tanaka, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata, "A Local EM-Analysis Attack Resistant Cryptographic Engine with Fully-Digital Oscillator-Based Tamper-Access Sensor," IEEE 2014 Symposium on VLSI Circuits, Dig. of Tech. Papers, #16.4, pp. 172-173, June 2014. Honolulu.
36 Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger, "Correlation Power Analysis using Bit-Level Biased Activity Plaintexts against AES Cores with Countermeasures," Proc. 2014 International Symposium on Electromagnetic Compatibility, Tokyo, #14P2-A3, pp. 306-309, May 2014. Tokyo.
35 Yuuki Araga, Ranto Miura, Nao Ueda, Noriyuki Miura, Makoto Nagata, "In-Stack Monitoring of Signal and Power Nodes in Three Dimensional Integrated Circuits," Proc. 2014 International Symposium on Electromagnetic Compatibility, Tokyo, #14P2-B1, pp. 362-365, May 2014. Tokyo.
34 Masahiro Yamaguchi, Yasushi Endo, Satoshi Tanaka, Tetsuo Ito, Sho Muroga, Naoya Azuma, Makoto Nagata, "On-Chip Magnetic Thin-Film Noise Suppressor for IC Chip Level Digital Noise Countermeasure," Proc. 2014 International Symposium on Electromagnetic Compatibility, Tokyo, #14P1-B4, pp. 354-357, May 2014. Tokyo.
33 Daisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Shivam Bhasin, Jean-Luc Danger, "Side-Channel Leakage on Silicon Substrate of CMOS Cryptographic Chip," Proc. 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2014), #3-3, pp. 32-37, May 2014. Arlington.
32 Taisuke Hayashi, Noriyuki Miura, Kumpei Yoshikawa, Makoto Nagata, "A Passive Supply-Resonance Suppression Filter Utilizing Inductance- Enhanced Coupled Bonding-W Coils," Proc. IEEE 2014 International Symposium on VLSI Design, Automation and Test (VLSI-DAT 2014), #DR52, pp. 121-124, Apr. 2014. Hsinchu.
31 Shivam Bhasin, Jean-Luc Danger, Tarik Graba, Yves Mathieu, Daisuke Fujimoto, Makoto Nagata, "Physical Security Evaluation at an Early Design-Phase: A Side-Channel Aware Simulation Methodology," ACM Workshop Proc. Engineering Simulations for Cyber Physical Systems (ES4CPS), #3, pp. 13-20, Mar. 2014. Dresden
30 Noriyuki Miura, Shiro Dosho, Satoshi Takaya, Daisuke Fujimoto, Takuya Kiriyama, Hiroyuki Tezuka, Takuji Miki, Hiroto Yanagawa, Makoto Nagata, "A 1mm-Pitch 80×80-Channel 322Hz-Frame-Rate Touch Sensor with Two-Step Dual-Mode Capacitance Scan," Dig. Tech. Papers, 2014 IEEE Intl. Solid-State Circuits Conference (ISSCC), #12.4, pp. 216-217, Feb. 2014. San Francisco.
29 Kumpei Yoshikawa, Yuji Harada, Noriyuki Miura, Noriaki Takeda, Yoshiyuki Saito, Makoto Nagata, "Immunity Evaluation of Inverter Chains against RF Power on Power Delivery Network," Proc. 2013 IEEE 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo), #IM1-4, pp. 232-237, Dec. 2013. Nara
28 Akitaka Murata, Shuji Agatsuma, Daisaku Ikoma, Kouji Ichikawa, Takahiro Tsuda, Makoto Nagata, Kumpei Yoshikawa, Yuuki Araga, Yuji Harada, "Noise Analysis using On-Chip waveform Monitor in Bandgap Voltage References," Proc. 2013 IEEE 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo), #IM1-3, pp. 226-231, Dec. 2013. Nara
27 Sho Muroga, Yutaka Shimada, Yasushi Endo, Satoshi Tanaka, Masahiro Yamaguchi, Motoki Murakami, Kazuaki Hori, Naoya Azuma, Makoto Nagata, Satoru Takahashi, "In-Band Spurious Attenuation in LTE-Class RFIC Chip using a Soft Magnetic Thin Film," Proc. 2013 IEEE 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo), #SS-5, pp. 47-52, Dec. 2013. Nara
26 Naoya Azuma, Shunsuke Shimazaki, Noriyuki Miura, Makoto Nagata, Tomomitsu Kitamura, Satoru Takahashi, Motoki Murakami, Kazuaki Hori, Atsushi Nakamura, Kenta Tsukamoto, Mizuki Iwanami, Eiji Hankui, Sho Muroga, Yasushi Endo, Satoshi Tanaka, Masahiro Yamaguchi, "Measurements and Simulation of Substrate Noise Coupling in RF ICs with CMOS Digital Noise Emulator," Proc. 2013 IEEE 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo), #SS-4, pp. 42-46, Dec. 2013. Nara
25

Makoto Nagata, Shunsuke Shimazaki, Naoya Azuma, Satoru Takahashi, Motoki Murakami, Kazuaki Hori, Satoshi Tanaka, Masahiro Yamaguchi, "Measurement-Based Diagnosis of Wireless Communication Performance in the Presence of In-Band Interferers in RF ICs," Proc. 2013 IEEE 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo), #SS-3, pp. 37-41, Dec. 2013. Nara

24 Makoto Nagata, Sathoshi Takaya, Hiroaki Ikeda, "Very low-voltage swing while high-bandwidth data transmission through 4096 bit TSVs," IEEE International 3D Systems Integration Conference (3DIC 2013), #3-1, pp. 3.1.1-3.1.4, Oct. 2013. San Francisco.
23 Shunsuke Shimazaki, Shota Taga, Tetsuya Makita, Naoya Azuma, Noriyuki Miura, Makoto Nagata, "Emulation of High Frequency Substrate Noise in CMOS Digital Circuits with Effects of Adjusting Clock Skew," Extended Abstracts of the 2013 International Conference on Solid State Devices and Materials (SSDM 2013), #PS-5-5, pp. 124, Sep. 2013. Fukuoka
22 Naoya Azuma, Tetsuya Makita, Shinichiro Ueyama, Makoto Nagata, Satoru Takahashi, Motoki Murakami, Kazuaki Hori, Satoshi Tanaka, Masahiro Yamaguchi, "In-System Diagnosis of RF ICs for Tolerance against On-Chip In-Band Interferers," Proc. 2013 IEEE International Test Conference (ITC 2013), #12.3, pp. 12.3.1-12.3.9, Sep. 2013. Anaheim
21 Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Jean-Luc Danger, "On-Chip Power Noise Measurements of Cryptographic VLSI Circuits and Interpretation for Side-Channel Analysis," Proc. 2013 IEEE International Symposium on Electromagnetic Compatibility in Europe (EMC Europe 2013), pp. 405-410, Sep. 2013. Brugge
20 Sho Muroga, Yasushi Endo, Tetsuo Ito, Satoshi Tanaka, Motoki Murakami, Kazuaki Hori, Satoru Takahashi, Naoya Azuma, Tetsuya Makita, Satoshi Imai, Makoto Nagata, Masahiro Yamaguchi, "In-Band Spurious Attenuation in LTE-Class RFIC Chip using a Soft Magnetic Thin Film," Proc. 2013 IEEE International Symposium on Electromagnetic Compatibility (EMC 2013), TH-AM-3-1, pp. 657-661, Aug. 2013. Denver
19 Yuji Harada, Kumpei Yoshikawa, Noriyuki Miura, Makoto Nagata, Akitaka Murata, Syuji Agatsuma, Kouji Ichikawa, "Power-Noise Measurements of Small-Scale Inverter Chains," Proc. IEEE 2013 International Meeting for Future of Electron Devices, Kansai (IMFEDK 2013), #PS-03, pp. 102-103, May 2013. Osaka
18 Makoto Nagata, Daisuke Fujimoto, Daichi Tanaka, "Power Current Modeling of Cryptographic VLSI Circuits for Analysis of Side Channel Attacks," Proc. 2013 IEEE Asia-Pacific International Symposium and Exhibition on Electromagnetic Compatibility (APEMC 2013), #103, pp. 1-4, May 2013. Melbourne
17 Takuya Sawada, Kumpei Yoshikawa, Hidehiro Takata, Koji Nii, Makoto Nagata, "Measurements of SRAM Sensitivity against AC Power Noise with Effects of Device Variation," Proc. 2013 IEEE International Conference on Microelectronic Test Structures (ICMTS 2013), #4.2, pp. 77-80, Mar. 2013, Osaka.
16 Satoshi Takaya, Makoto Nagata, Atsushi Sakai, Takashi Kariya, Shiro Uchiyama, Harufumi Kobayashi, Hiroaki Ikeda, "A 100GB/s Wide I/O with 4096b TSVs Through an Active Silicon Interposer with In-Place Waveform Capturing," Dig. Tech. Papers, 2013 IEEE Intl. Solid-State Circuits Conference (ISSCC), #24.8, pp. 434-435, Feb. 2013, San Francisco.
15 Kumpei Yoshikawa, Makoto Nagata, "Co-simulation of AC Power Noise of CMOS Microprocessor using Capacitor Charging Modeling," Proc. IEEE CPMT Symposium Japan 2012 #19-2, pp. 293-296, Dec. 2012. Kyoto.
14 Takeshi Okumoto, Kumpei Yoshikawa, Makoto Nagata, "Monitoring Effective Supply Voltage within Power Rails of Integrated Circuits," Proc. 2012 IEEE Asian Solid-State Circuits Conference (A-SSCC 2012), #4-4, pp. 113-116, Nov. 2012. Kobe.
13 Takuya Sawada, Hidehiro Takata, Koji Nii, Makoto Nagata, "Sensitivity of SRAM Operation against AC Power Supply Voltage Variation," Extended Abstracts of the 2012 International Conference on Solid State Devices and Materials (SSDM 2012), #J-3-1, pp. 1128-1129, Sep. 2012. Kyoto.
12 Sho Endo, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Toshihiro Katashita, Yohei Hori, Kazuo Sakiyama, Makoto Nagata, Jean-Luc Danger, Thanh-Ha Le and Pirouz Bazargan Sabet, "Measurement of Side-Channel Information from Cryptographic Devices on Security Evaluation Platform: Demonstration of SPACES Project," SICE Annual Conference 2012, #TuA11-05, pp.313-316, Aug. 2012. Akita.
11 Yuta Sasaki, Kumpei Yoshikawa, Kouji Ichikawa, Makoto Nagata, "Co-Evaluation of Power Supply Noise of CMOS Microprocessor using On-Boar Magnetic Probing and On-Chip Waveform Capturing Techniques," IEEE 2012 International Meeting for Future of Electron Devices, Kansai (IMFEDK 2012), #S-1, pp. 70-71, May 2012, Osaka.
10 Yuuki Araga, Makoto Nagata, Geert Van der Plas, Jaemin Kim, Nikolaos Minas, Pol Marchal, Youssef Travaly, Michael Libois, Antonio La Manna, Wenqi Zhang, Eric Beyne, "In-Tier Diagnosis of Power Domains in 3D TSV ICs," IEEE International 3D System Integration Conference (3DIC 2011), #7-2, pp. 7.2.1-7.2.4, Jan. 2012, Osaka.
9 Naoya Azuma, Yasutaka Kanda, Makoto Nagata, "Extraction of Lumped RC Elements Representing Substrate Coupling of RF Devices," IEEE International Symposium on Radio-Frequency Integration Technology (RFIT 2011), #FR2B-3, pp. 217-220, Dec. 2011, Beijing.
8 Makoto Nagata, Xihua Lin, Naoya Azuma, Masahiro Yamaguchi, "Evaluation of Substrate Noise Coupling in RFICs (Invited)," IEEE International Symposium on Radio-Frequency Integration Technology (RFIT 2011), #TH3B-1, pp. 141-144, Dec. 2011, Beijing.
7 Kumpei Yoshikawa, Yuuta Sasaki, Kouji Ichikawa, Yoshiyuki Saito, Makoto Nagata, "Measurements and Co-Simulation of On-Chip and On-Board AC Power Noise in Digital Integrated Circuits," IEEE 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo 2011), #S3P2, pp. 76-81, Nov. 2011, Dubrovnik.
6 Takuya Sawada, Taku Toshikawa, Kumpei Yoshikawa, Hidehiro Takata, Koji Nii, Makoto Nagata, "Immunity Evaluation of SRAM Core Using DPI with On-Chip Diagnosis Structures," IEEE 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo 2011), #S2P6, pp. 65-70, Nov. 2011, Dubrovnik.
5 Masahiro Yamaguchi, Sho Muroga, Yasushi Endo, Wataru Kodate, Kumpei Yoshikawa, Yuta Sasaki, Makoto Nagata, "Performance of Integrated Magnetic Thin Film Noise Suppressor Applied to CMOS Noise Test Chips," The 41st European Microwave Conference (EuMA), #03-3, pp. 49-52, Oct. 2011, Manchester.
4 Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Akihiko Sasaki, Yohei Hori, Akashi Satoh, "A Fast Power Current Analysis Methodology Using Capacitor Charging Model for Side Channel Attack Evaluation," 2011 IEEE Intl. Symp. Hardware-Oriented Security and Trust (HOST 2011), #P35, pp. 87-92, June 2011. San Diego.
3 Kumpei Yoshikawa, Takushi Hashida, Makoto Nagata, "An On-Chip Waveform Capturer for Diagnosing Off-Chip Power Delivery (Invited)," 2011 IEEE Intl. Conf. on Integrated Circuit Design and Technology (ICICDT 2011), #C3, May 2011, Kaoshiung.
2 Takushi Hashida, Yuuki Araga, Makoto Nagata, "A Diagnosis Testbench of Analog IP Cores Against On-Chip Environmental Disturbances," 2011 29th IEEE VLSI Test Symposium, #2B3, pp. 70-75, May 2011. Dana Point.
1 Sho Muroga, Yasushi Endo, Wataru Kodate, Yoshiaki Sasaki, Kumpei Yoshikawa, Yuta Sasaki, Makoto Nagata, Masahiro Yamaguchi, "Evaluation of Thin Film Noise Suppressor Applied to Noise Emulator Chip Implemented in 65 nm CMOS Technology," IEEE Intl. Magnetics Conference (Intermag 2011), #HH-03, pp. 1-4, Apr. 2011, Taipei.