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国際会議論文(査読有り) 2014年

15 Daisuke Fujimoto, Makoto Nagata, Shivam Bhasin, Jean-Luc Danger, "A Novel Methodology for Testing Hardware Security and Trust Exploiting On-Chip Power Noise Measurement," Proc. 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), #8C-3, pp. 749-754, Jan. 2015. Makuhari.
14 Daisuke Fujimoto, Noriyuki Miura, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata, "A DPA/DEMA/LEMA-Resistant AES Cryptographic Processor with Supply-Current Equalizer and Micro EM Probe Sensor ," Proc. 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), #1S-13, pp. 26-27, Jan. 2015. Makuhari.
13 Masahiro Yamaguchi, Satoshi Tanaka, Yasushi Endo, Makoto Nagata, Hiroaki Matsui, Mizuki Iwanami, Kenta Tsukamoto, "IC Chip Level Low Noise Technology for High Speed and High Quality Telecommunication Systems (Invited)," Proceedings of Asia-Pacific Microwave Conference 2014 (APMC 2014), TH2E-1, pp. 540-542, Nov. 2014. (Sendai)
12 Makoto Nagata, Daisuke Fujimoto, Noriyuki Miura, "On-Chip Monitoring for In-Place Diagnosis of Undesired Power Domain Problems in IC Chips," The 23rd Asian Test Symposium (ATS 2014), #6C-3, pp. 258-262, 2014.11.18. Hangzhou.
11 Noriyuki Miura, Daisuke Fujimoto, Rie Korenaga, Kohei Matsuda, Makoto Nagata, "An Intermittent-Driven Supply-Current Equalizer for 11x and 4x Power-Overhead Savings in CPA-Resistant 128bit AES Cryptographic Processor," Proc. 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC 2014), #14-5, pp. 225-228, Nov. 2014. Kaohsiung.
10 Naofumi Homma, Yu-ichi Hayashi, Noriyuki Miura, Daisuke Fujimoto, Daichi Tanaka, Makoto Nagata, Takafumi Aoki, "EM Attack Is Non-Invasive? -- Design Methodology and Validity Verification of EM Attack Sensor," IACR Workshop on Cryptographic Hardware and Embedded Systems 2014 (CHES 2014), #1-1, LNCS 8731, pp. 1-16, Sep. 2014. Busan.
9 Yuuki Araga, Ranto Miura, Makoto Nagata, Cesar Roda Neve, Joeri De Vos, Geert Van der Plas, Eric Beyne, "A Study on Power Integrity in a 3D Chip Stack Using Dynamic Power Supply Current Emulation and Power Noise Monitoring," IEEE Electronics System-Integration Technology Conference (ESTC 2014), #S14P2, pp. 1-5, Sep. 2014. Helsinki.
8 Makoto Nagata, Satoshi Takaya, Hiroaki Ikeda, Dimitri Linten, Mirko Scholz, Shih-Hung Chen, Keiichi Hasegawa, Taizo Shintani, Masanori Sawada, "CDM Protection of a 3D TSV Memory IC with a 100 GB/s Wide I/O Data Bus," Proc. ESDA 36th Annual EOS/ESD Symposium, #2A-2, pp. 1-7, Sep. 2014. Tuscon.
7 Noriyuki Miura, Daisuke Fujimoto, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata, "Integrated-Circuit Countermeasures Against Information Leakage Through EM Radiation," Proc. 2014 IEEE Intl. Symposium on Electromagnetic Compatibility, #TH-AM-3-3, pp. 748-751, Aug. 2014. Raleigh.
6 Noriyuki Miura, Daisuke Fujimoto, Daichi Tanaka, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Makoto Nagata, "A Local EM-Analysis Attack Resistant Cryptographic Engine with Fully-Digital Oscillator-Based Tamper-Access Sensor," IEEE 2014 Symposium on VLSI Circuits, Dig. of Tech. Papers, #16.4, pp. 172-173, June 2014. Honolulu.
5 Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger, "Correlation Power Analysis using Bit-Level Biased Activity Plaintexts against AES Cores with Countermeasures," Proc. 2014 International Symposium on Electromagnetic Compatibility, Tokyo, #14P2-A3, pp. 306-309, May 2014. Tokyo.
4 Yuuki Araga, Ranto Miura, Nao Ueda, Noriyuki Miura, Makoto Nagata, "In-Stack Monitoring of Signal and Power Nodes in Three Dimensional Integrated Circuits," Proc. 2014 International Symposium on Electromagnetic Compatibility, Tokyo, #14P2-B1, pp. 362-365, May 2014. Tokyo.
3 Masahiro Yamaguchi, Yasushi Endo, Satoshi Tanaka, Tetsuo Ito, Sho Muroga, Naoya Azuma, Makoto Nagata, "On-Chip Magnetic Thin-Film Noise Suppressor for IC Chip Level Digital Noise Countermeasure," Proc. 2014 International Symposium on Electromagnetic Compatibility, Tokyo, #14P1-B4, pp. 354-357, May 2014. Tokyo.
2 Daisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Shivam Bhasin, Jean-Luc Danger, "Side-Channel Leakage on Silicon Substrate of CMOS Cryptographic Chip," Proc. 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2014), #3-3, pp. 32-37, May 2014. Arlington.
1 Taisuke Hayashi, Noriyuki Miura, Kumpei Yoshikawa, Makoto Nagata, "A Passive Supply-Resonance Suppression Filter Utilizing Inductance- Enhanced Coupled Bonding-W Coils," Proc. IEEE 2014 International Symposium on VLSI Design, Automation and Test (VLSI-DAT 2014), #DR52, pp. 121-124, Apr. 2014. Hsinchu.