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学術論文(査読有り) 2018年

6 Takuji Miki, Noriyuki Miura, Hiroki Sonoda, Kento Mizuta, Makoto Nagata, "A Random Interrupt Dithering SAR Technique for Secure ADC Against Reference-Charge Side-Channel Attack," IEEE Transactions on Circuits and Systems II: Express Briefs, to appear, Feb. 2019. DOI:10.1109/TCSII.2019.2901534
5 Yuuki Araga, Makoto Nagata, Hiroaki Ikeda, Takuji Miki, Noriyuki Miura, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi, "A Thick Cu Layer Buried in Si Interposer Backside for Global Power Routing," IEEE Transactions on Components, Packaging and Manufacturing Technology, Vol. 9, No. 3, pp. 502-510, Mar. 2019. DOI:10.1109/TCPMT.2018.2877211
4 Kohei Matsuda, Tatsuya Fujii, Natsu Shoji, Takeshi Sugawara, Kazuo Sakiyama, Yu-ichi Hayashi, Makoto Nagata, Noriyuki Miura, "A 286 F2/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser Against Laser Fault Injection Attack on Cryptographic Processor," IEEE Journal of Solid-State Circuits, Vol. 53, No. 11, pp. 3174-3182, Sep. 2018. DOI:10.1109/JSSC.2018.2869142
3 Noriyuki Miura, Masanori Takahashi, Kazuki Nagatomo, Makoto Nagata, "Chip-Package-Board Interactive PUF Utilizing Coupled Chaos Oscillators with Inductor," IEEE Journal of Solid-State Circuits, Vol. 53, No. 10, pp. 2889-2897, Jul. 2018. DOI:10.1109/JSSC.2018.2852325
2 Daisuke Fujimoto, Shota Nin, Yu-ichi Hayashi, Noriyuki Miura, Makoto Nagata, Tsutomu Matsumoto, "A Demonstration of a HT-Detection Method Based on Impedance Measurements of the Wiring Around ICs," IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 65, No. 10, pp. 1320-1324, Jul. 2018. DOI:10.1109/TCSII.2018.2858798
1 Yuuki Araga, Makoto Nagata, Joeri De Vos, Geert Van der Plas, Eric Beyne, "A Study on Substrate Noise Coupling among TSVs in 3D Chip Stack," IEICE Electronics Express, Vol. 15, No. 13, pp. 1-8, Jul. 2018. DOI:10.1587/elex.15.20180460