|5||Naofumi Homma, Yu-ichi Hayashi, Takafumi Aoki, Noriyuki Miura, Daisuke Fujimoto, Makoto Nagata, "Design Methodology and Validity Verification for a Reactive Countermeasure Against EM Attacks," IACR Journal of Cryptology, pp. 1-19, Online, Dec. 2015.|
|4||Makoto Nagata, Satoshi Takaya, Hiroaki Ikeda, "In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking," IEEE Design and Test, Vol. 32, No. 6, pp. 87-98, Nov. 2015.
|3||Noriyuki Miura, Shiro Dosho, Hiroyuki Tezuka, Takuji Miki, Daisuke Fujimoto, Takuya Kiriyama, Makoto Nagata, "A 1 mm Pitch 80 × 80 Channel 322 Hz Frame-Rate Multitouch Distribution Sensor With Two-Step Dual-Mode Capacitance Scan," IEEE Journal of Solid-State Circuits, Vol. 50, No. 11, pp. 2741-2749, Nov. 2015.
Takuya Sawada, Kumpei Yoshikawa, Hidehiro Takata, Koji Nii, Makoto Nagata, "An Extended Direct Power Injection Method for In-Place Susceptibility Characterization of VLSI Circuits Against Electromagnetic Interference," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 23, No. 10, pp. 2347-2351, Oct. 2015.
|1||Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Jean-Luc Danger, Takafumi Aoki, "A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 23, No. 8, p. 1429-1438, Aug. 2015.